Adavance Computer Architecture

Course Objective:

• The objective of this course is to provide a through discussion of fundamentals of computer architecture. After doing this course you will be able to appreciate the following :-
• The Nature and characteristics of modern day computer systems.
• Tremendous variety exists from single chip microprocessors to super computers. The various systems differ not only in costs but also in size, performance and applications.
• Impact of rapid pace of change covering all aspects of computer technology from underlying integrated circuit. Technology to increasing use of parallel organization concepts in combining those components.
• Certain fundamental concepts that apply to all types of computers.
• All the basic performance characteristics of computer systems like processor speed, Memory speed, Memory capacity, and interconnection data rate are increasing rapidly but they are increasing at different rates. So designing a balanced system that maximizes the performance and utilization of all elements is a challenge.
  Why Study Computer Architecture:
  • As a professional in field of computing one should not regard the computer as a black box that executes programs by magic 
  • As a professional in field of computing one should acquire some understanding and appreciation of computer system’s functional components, their characteristics, their performance and their interactions.
  • As a professional in field of computing one needs to understand computer architecture in order to structure a program so that it runs more efficiently on a real m/c.
  • As a professional in field of computing one should understand how to select a computer system for your personal use or for your organizational use by properly understanding the tradeoffs involved among various components like CPU clock speed, Cache size and Memory Size etc.
  • Major Computer manufacturers offer a family of computer models based on same architecture but with different organization
  • Various Intel CPU’s are based on same architecture but have different organization offering different levels of performance and price.
  • IBM System 370 architecture introduced in 1970 has survived to this day as the architecture of IBM mainframe product line.
  • Various implementation of RISC architecture are available in the market like SUN Spark, Power PC etc. 
  The State of Computing:
  
  Early computing was entirely mechanical:
  1. abacus (about 500 BC)
  2. mechanical adder/subtracter (Pascal, 1642)
  3. difference engine design (Babbage, 1827)
  4. binary mechanical computer (Zuse, 1941)
  5. electromechanical decimal machine (Aiken, 1944)
  Mechanical and electromechanical machines have limited speed and reliability because of the many moving parts.  Modern machines use electronics for most information transmission.
  
  

  Computer Architecture & Organization

  Amdahl, Blaauw and Brookes, 1964 (IBM 360 team):

  The structure of a computer that a machine language programmer must understand to write a correct (timing independent) program for that machine

  Computer Architecture: Those attributes of a system which are visible to a machine language programmer having direct impact on logical execution of a program. These attributes include Instruction set, word size, no of bits used to represent various data types, techniques of addressing memory etc.Computer Organization: The operational units and their inter connections that realize the architecture. Control signals , Memory Technology, Interfaces between computer and peripherals etc.Example: It is an Architectural design issue whether a computer will have Multiply Instruction.It is an Organizational issue whether this will be implemented using a separate Multiply Unit or whether it will be implemented using repetitive add function.

  Approach to learn ACA 

  A computer is a complex system; Modern day computers contain millions of elementary electronic components. The problem is how to clearly describe them all.

  
  

  Recognizing the hierarchical nature of most complex systems , including computers we employ the top down approach and break a typical computer system into interrelated subsystems, each of the latter , in turn hierarchical in structure until we reach some lowest level of elementary subsystem.

  
  

  We begin with the major components of a computer describing their function and structure and proceed to successively lower layers of hierarchy.

  Basic Components of a Computer

  The basic functional units of a Computer consists of:

  
  

  Control Unit: It contains registers and decoding hardware required to interpret the current instruction ( In the Instruction Register). It controls the sequence of actions in the data paths to provide correct instruction execution.

  
  

  Data Paths : It consists of ALU ( Arithmetic Logical Unit), any other specialized execution unit (Floating Point Etc.), Address Generation Hardware, data and address registers, and the inter connect between all these units.

  
  

  Both these units are generally combined in one unit called CPU and in case of microprocessors its fabricated on single chip.

  Memory : The memory unit is another crucial piece of hardware. It includes a Memory Address Register ( MAR ), A Storage Register ( SR ) and Memory Cells.
  

   Some Definitions and Terms

  State: It is a particular configuration of storage units like Registers or Memory, and a state transition is a change in that configuration.

  Cycle: It is the Time between state transitions. If storage registers are being reconfigured , its called Machine Cycle. If Memory is being reconfigured it is called  Memory Cycle.

  Command: A term used to describe various Instructions, is responsible for affecting state changes.

  Process: It is a sequence of commands and an initial state. These sequence of commands apply to the initial state and generate a final state.

  Machine: The Implementation that interprets the commands and make the state transitions happen. This Implementation can in turn be Implemented using another machine having its own storage and instruction sets. In such circumstances the outermost machine is called Image (or Micro) Machine and other is called host machine.

  The set of all Image Commands and Storage is defined as the Architecture of the machine.

  Some Definitions and Terms (Contd.)

  Storage: This the storage referred by the Instruction Set of the machine and includes Memory and Register Set. If the instruction set cannot refer to a hidden register, it is not part of the storage, but rather part of implementation.

   The Machine: Interpretation & Microprogramming

  Management of the interpretation process is the responsibility of the decoder.

  
  

  The Interpretation Process begins with the Instruction (Stored in the memory being Fetched or transferred to Instruction Register ) OP Code field being decoded by the

  
  
  
  

  OP CODE     A     B    C

  
  

  Decoder (A part of the implementation mechanism) controls the Data Paths (which connects output of one register to input of other registers and vice versa ) consisting of combinational logic. Each OP Code  defines which of the various data paths  will be used in its Execution.

  
  

  The Collection of all OP codes ( Instruction Set ) define all the Data Paths required by a specific Architecture.

  
  

  The activation of a particular Data Path is done through a Control Point activated and defined for each particular cycle of operation by the Instruction Decoder.

  The Machine: Interpretation & Microprogramming ( Contd…)

  The Decoder activates Storage and Registers for a series of state transitions that correspond to the action of OP Code.

  
  

  The Storage and Registers used in Instructions can be both Explicit and Implicit.

  
  

  Explicit Registers Include:

  
  

  • General Purpose Registers ( GPR )

  
  

  •Accumulators (ACC)

  
  

  •Address Registers ( Index or Base Registers ).

  
  

  
  

  Implicit Registers Include:

  
  

  • PC (Program or Instruction Counter) – Contains address of next instruction in sequence. Most Instruction Formats Imply current location + length of current instruction.

  
  

  •Instruction Register (IR)– This register holds the Instruction being interpreted or executed. Decoding is performed on the opcode held in this register.

  
  

  •Memory Address Register ( MAR )- Address register for the memory operation.

  The Machine: Interpretation & Microprogramming ( Contd…) 

  •Storage Register-Also referred as memory buffer register is used to Read or Write data to Memory.

  •Special Use Register – Usage depending on Instruction.
  

  The Machine: Interpretation & Microprogramming

  
  

  Instruction Decoder which has the responsibility of activation and defining of every control point in the processor for every cycle of operation can be implemented both Directly or as a Microprogrammed storage.

  
  

  
  

  Direct Decoders are designed using combinational logic (Usually PLA’s) to represent the various desired control point actions. 

  
  

  The logical input comes from the OP Code (The type of Instruction to be performed), The Sequence Counter ( A small counter to keep track of which cycle with in an Instruction execution is being activated), and some test info from the data registers ( Eg. Sign value), to correctly set the next control action

   
  

  
  Micro programmed Decoder  are designed using ROM and sometimes complemented with RAM. The OP Code provides an initial address to an entry which specifies the control point values as well as the expected address of the next micro instruction.

  
  

  
  

  In Micro programmed machines the micro instruction defines the control point values required throughout the system as well as controls the sequencing of the interpretation of a operation.

  In most machines the control points are encoded in some fashion in micro instruction representation and most micro instruction formats include the address of next micro instruction to perform desired sequencing.

  
  

  Direct Decoders Vs Micro programmed Decoders 

  
  

  Attribute	Direct Decoders	Microprogrammed Decoder
  Speed	Fast	Slower
  Chip Area Efficiency	Uses Least area	Uses More Area
  Ease Of Change	Somewhat Difficult	Easier
  Large/Complex Instruction Sets	Somewhat Difficult	Easier
  Support of Operating Systems and Diagnostic Features	Very Difficult	Easy
  Where Used	Mostly RISC M/C	Main Frames / Microprocessors
  Instruction set size	Usually under 100	Usually over 100

  The Instruction Set 

  Instruction Sets define the many different kinds of data and their manipulations by different processors.

  
  

  Since Instruction set details vary widely from processor to processor , three generic approaches are used to describe the different architecture types.

  
  

  
  

  Consistent with most modern machines, each of these generic approaches are based on a register set to hold operands and addresses. These register sets vary from 8 to 32 words with each word consisting of 32 bits.

  
  

  
  

  Additional sets of floating point registers and associated floating point execution hardware is assumed to be available whenever floating point arithmetic operations are available in the architecture. ( These can be provided as a separate chip with close coupling to to the microprocessor or integrated on the main processor chip as floating point unit.)
  
  

  The major three Instruction Set Types are:

  
  

  The L/S Architecture: The L/S or Load Store architecture specifies that all operand values must be loaded from Memory into Registers before an execution can take place.

  
  

  
  

  Mostly used in RISC machines. RISC architecture tries to reduce the amount of complexity in the Instruction Set itself and regularize the instruction format so as to simplify decoding of Instructions